signal_generator Entity Reference

Signal Generator. More...

Collaboration diagram for signal_generator:

Libraries
ieee
	Use Standard Library.

Use Clauses
std_logic_1164
	Use Logic Elements.
std_logic_arith
	Use Conversion Functions.
std_logic_signed
	Use Conversion Functions.

Ports
clock	in STD_LOGIC
	component clock
run	in STD_LOGIC
	run or stop the signal_generator
prescaler	in STD_LOGIC
	input for minimum time-base
reset_n	in STD_LOGIC
	resets the component
mode	in STD_LOGIC_VECTOR ( 3 DOWNTO0 )
	mode to run motor with
speed	in STD_LOGIC_VECTOR ( 2 DOWNTO0 )
	speed to run moter with
direction	in STD_LOGIC
	motor direction ('0' is LEFT)
ir	out STD_LOGIC
	IR signal set when motor stopped.
steps	out STD_LOGIC_VECTOR ( 31 DOWNTO0 )
	number of steps motor did
motor_pwm	out STD_LOGIC_VECTOR ( 3 DOWNTO0 )
	signal-bus for the motor pulse-width-modulation
motor_en	out STD_LOGIC_VECTOR ( 1 DOWNTO0 )
	both enable signals for the motor

Detailed Description

Signal Generator.

Definition at line 68 of file signal_generator.vhd.

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The documentation for this class was generated from the following file:

• signal_generator.vhd