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Stepper-Motor-Control  v3.0.0
System on a Chip 2014 - Group 04
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register_interface_tb.vhd
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1 -----------------------------------------------------------------------------
2 --! @file register_interface_tb.vhd
3 --! @author Marc Kossmann
4 --! @author Michael Riedel
5 --! @version v2.0.0
6 --! @date 05.12.2014
7 --!
8 --! @brief Testbench for Register Component
9 --! @details Tests full functionality of component
10 --! @par History:
11 --! @details v0.1.0 06.11.2014 Kossmann
12 --! - first draft
13 --! @details v0.1.1 07.11.2014 Kossmann
14 --! - finished reset_n task
15 --! @details v1.0.0 18.11.2014 Riedel & Kossmann
16 --! - verified functionality -> release MS2
17 --! @details v1.0.1 23.11.2014 Riedel & Kossmann
18 --! - added test of reserved mode
19 --! @details v2.0.0 05.12.2014 Riedel & Kossmann
20 --! - release milestone 3b
21 -----------------------------------------------------------------------------
22 
23 --! Use Standard Library
24 LIBRARY ieee;
25 --! Use Logic Elements
26 USE ieee.std_logic_1164.all;
27 --! Use Conversion Functions
28 USE ieee.STD_LOGIC_SIGNED.all;
29 
30 --! @brief Entity of testbench for register_interface
32 END;
33 
34 --! @brief Architecture of testbench for register_interface
35 --! @details first test if all registers can be written
36 --! then resets everything
37 --! test if set and clear is working the right way
38 ARCHITECTURE register_interface_tb_arch OF register_interface_tb IS
39  SIGNAL write_n : STD_LOGIC := '1';
40  SIGNAL greenleds : STD_LOGIC_VECTOR (7 DOWNTO 0) := (OTHERS => '0');
41  SIGNAL addr : STD_LOGIC_VECTOR (2 DOWNTO 0) := "111";
42  SIGNAL clock : STD_LOGIC := '0';
43  SIGNAL ce_n : STD_LOGIC := '1';
44  SIGNAL reset_n : STD_LOGIC := '0';
45  SIGNAL read_n : STD_LOGIC := '1';
46  SIGNAL redleds : STD_LOGIC_VECTOR (7 DOWNTO 0) := (OTHERS => '0');
47  SIGNAL write_data : STD_LOGIC_VECTOR (31 DOWNTO 0) := (OTHERS => '0');
48  SIGNAL irq : STD_LOGIC := '0';
49  SIGNAL read_data : STD_LOGIC_VECTOR (31 DOWNTO 0) := (OTHERS => '0');
50  SIGNAL run : STD_LOGIC := '0';
51  SIGNAL direction : STD_LOGIC := '0';
52  SIGNAL mode : STD_LOGIC_VECTOR(3 DOWNTO 0) := (OTHERS => '0');
53  SIGNAL speed : STD_LOGIC_VECTOR(2 DOWNTO 0) := (OTHERS => '0');
54  SIGNAL steps : STD_LOGIC_VECTOR(31 DOWNTO 0) := (OTHERS => '0');
55  SIGNAL ir : STD_LOGIC := '0';
56 
57  COMPONENT register_interface
58  PORT (
59  clock : IN STD_LOGIC; --! Avalon clock
60  reset_n : IN STD_LOGIC; --! Avalon reset the component
61  ce_n : IN STD_LOGIC; --! Avalon chip enable
62  read_n : IN STD_LOGIC; --! Avalon set read-request
63  write_n : IN STD_LOGIC; --! Avalon set write-request
64  addr : IN STD_LOGIC_VECTOR (2 DOWNTO 0); --! Avalon address bus (selects the register)
65  write_data : IN STD_LOGIC_VECTOR (31 DOWNTO 0); --! Avalon write data to selected register
66  read_data : OUT STD_LOGIC_VECTOR (31 DOWNTO 0); --! Avalon read data from selected register
67  irq : OUT STD_LOGIC; --! Avalon IRQ line
68  greenleds : OUT STD_LOGIC_VECTOR (7 DOWNTO 0); --! external: green leds
69  redleds : OUT STD_LOGIC_VECTOR (7 DOWNTO 0); --! external: red leds
70  run : OUT STD_LOGIC; --! enable signal for mcu
71  direction : OUT STD_LOGIC; --! direction signal for mcu
72  mode : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); --! output of Mode bits for mcu
73  speed : OUT STD_LOGIC_VECTOR(2 DOWNTO 0); --! output of speedReg for mcu
74  steps : IN STD_LOGIC_VECTOR(31 DOWNTO 0); --! input for stepsReg for mcu
75  ir : IN STD_LOGIC --! input request of mcu
76  );
77  END COMPONENT;
78 BEGIN
79  DUT : register_interface
80  PORT MAP
81  (
82  write_n => write_n,
83  greenleds => greenleds,
84  addr => addr,
85  clock => clock,
86  ce_n => ce_n,
87  reset_n => reset_n,
88  read_n => read_n,
89  redleds => redleds,
90  write_data => write_data,
91  irq => irq,
92  run => run,
93  direction => direction,
94  mode => mode,
95  speed => speed,
96  steps => steps,
97  ir => ir
98  );
99 
100 
101  -- first test if all registers can be written
102  -- then resets everything
103  -- test if set and clear is working the right way
104  clock <= not clock after 10 ns;
105  ce_n <= '0' after 20 ns;
106  reset_n <= '1' after 20 ns,
107  '0' after 140 ns,
108  '1' after 150 ns;
109  write_n <= '0' after 30 ns;
110  read_n <= '0' after 30 ns;
111  addr <= "000" after 30 ns, -- ctrlReg
112  "001" after 50 ns, -- ctrlSetReg
113  "010" after 70 ns, -- ctrlClrReg
114  "011" after 90 ns, -- speedReg
115  "100" after 110 ns, -- stepsReg
116  -- reset; now testing set and clear functionality
117  "000" after 150 ns, -- ctrlReg
118  "001" after 170 ns, -- ctrlSetReg
119  "010" after 190 ns, -- ctrlClrReg
120  "000" after 200 ns, -- ctrlReg
121  "111" after 230 ns; -- reserved
122  write_data(7 downto 0) <= "11111111" after 30 ns,
123  "10101010" after 150 ns,
124  "01010101" after 170 ns,
125  "10101010" after 190 ns,
126  "00000000" after 210 ns;
127  steps(15 downto 8) <= "11111111" after 130 ns;
128  ir <= '1' after 130 ns;
129 
130  finish_sim_time :process
131  begin
132  wait for 3000 ns;
133  assert false
134  report "simulation finished"
135  severity failure;
136  end process finish_sim_time;
137 END;
138 
in ce_nSTD_LOGIC
Avalon chip enable.
in read_nSTD_LOGIC
Avalon set read-request.
out redledsSTD_LOGIC_VECTOR(7 DOWNTO0)
external: red leds
Entity of testbench for register_interface.
Register Interface-Component.
in write_nSTD_LOGIC
Avalon set write-request.
out runSTD_LOGIC
enable signal for mcu
_library_ ieeeieee
Use Standard Library.
out speedSTD_LOGIC_VECTOR(2 DOWNTO0)
output of speedReg for mcu
in addrSTD_LOGIC_VECTOR(2 DOWNTO0)
Avalon address bus (selects the register)
out irqSTD_LOGIC
Avalon IRQ line.
out read_dataSTD_LOGIC_VECTOR(31 DOWNTO0)
Avalon read data from selected register.
in reset_nSTD_LOGIC
Avalon reset the component.
out greenledsSTD_LOGIC_VECTOR(7 DOWNTO0)
external: green leds
in write_dataSTD_LOGIC_VECTOR(31 DOWNTO0)
Avalon write data to selected register.
in clockSTD_LOGIC
Avalon clock.
in stepsSTD_LOGIC_VECTOR(31 DOWNTO0)
input for stepsReg for mcu
out directionSTD_LOGIC
direction signal for mcu
in irSTD_LOGIC
input request of mcu
out modeSTD_LOGIC_VECTOR(3 DOWNTO0)
output of Mode bits for mcu