Stepper-Motor-Control  v3.0.0
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signal_generator_tb.vhd
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1 -----------------------------------------------------------------------------
2 --! @file signal_generator_tb.vhd
3 --! @author Marc Kossmann
4 --! @author Michael Riedel
5 --! @version v1.0.0
6 --! @date 05.12.2014
7 --!
8 --! @brief Testbench for Signal Generator Component
9 --! @details Tests full functionality of component
10 --! @par History:
11 --! @details v0.1.0 26.11.2014 Riedel
12 --! - first draft
13 --! @details v1.0.0 05.12.2014 Riedel & Kossmann
14 --! - release milestone 3b
15 -----------------------------------------------------------------------------
16 
17 --! Use Standard Library
18 LIBRARY ieee;
19 --! Use Logic Elements
20 USE ieee.STD_LOGIC_1164.all;
21 --! Use Arithmetic Functions
22 USE ieee.STD_LOGIC_arith.all;
23 --! Use Conversion Functions
24 USE ieee.STD_LOGIC_SIGNED.all;
25 
26 --! @brief Entity of testbench for signal_generator
27 ENTITY signal_generator_tb IS
28 END;
29 
30 --! @brief Architecture of testbench for signal_generator
31 --! @details Test-procedure (1): reset_n
32 --! | signal | desired output |
33 --! | :------------- | :--------------|
34 --! | mode_state | `IDLE` |
35 --! | pwm_state | `ONE` |
36 --! | steps_counter | `0` |
37 --! | motor_pwm | `0000` |
38 --! | motor_en | `00` |
39 --! | ir | `0` |
40 --! @details Test-procedure (2): Continuous Run with speed = 0, direction = left
41 --! | signal | desired output |
42 --! | :------------- | :--------------|
43 --! | mode_state | `CR` |
44 --! | pwm_state | `ONE` |
45 --! | steps_counter | `0` |
46 --! | motor_pwm | `0000` |
47 --! | motor_en | `00` |
48 --! | ir | `0` |
49 --! @details Test-procedure (3): Continuous Run with speed = 1, direction = left
50 --! | signal | desired output |
51 --! | :------------- | :-------------------------------------|
52 --! | mode_state | `CR` |
53 --! | pwm_state | cycling `ONE`, `TWO`, `THREE`, `FOUR` |
54 --! | steps_counter | `0` |
55 --! | motor_pwm | `0000` |
56 --! | motor_en | `00` |
57 --! | ir | `0` |
58 --! @details Test-procedure (4): Continuous Run with speed = 7, direction = left
59 --! | signal | desired output |
60 --! | :------------- | :-------------------------------------|
61 --! | mode_state | `CR` |
62 --! | pwm_state | cycling `ONE`, `TWO`, `THREE`, `FOUR` |
63 --! | steps_counter | `0` |
64 --! | motor_pwm | `0000` |
65 --! | motor_en | `00` |
66 --! | ir | `0` |
67 --! @details Test-procedure (5): Continuous Run with speed = 7, direction = right
68 --! | signal | desired output |
69 --! | :------------- | :-------------------------------------|
70 --! | mode_state | `CR` |
71 --! | pwm_state | cycling `FOUR`, `THREE`, `TWO`, `ONE` |
72 --! | steps_counter | `0` |
73 --! | motor_pwm | `0000` |
74 --! | motor_en | `00` |
75 --! | ir | `0` |
76 --! @details Test-procedure (6): Chain of Steps - 1/4 rotation with speed = 0, direction = left
77 --! | signal | desired output |
78 --! | :------------- | :-------------------------------------|
79 --! | mode_state | `COS_1_4` |
80 --! | pwm_state | cycling `ONE`, `TWO`, `THREE`, `FOUR` |
81 --! | steps_counter | `0` |
82 --! | motor_pwm | `0000` |
83 --! | motor_en | `00` |
84 --! | ir | `0` |
85 --! @details Test-procedure (7): Chain of Steps - 1/2 rotation with speed = 0, direction = left
86 --! | signal | desired output |
87 --! | :------------- | :-------------------------------------|
88 --! | mode_state | `COS_1_2` |
89 --! | pwm_state | cycling `ONE`, `TWO`, `THREE`, `FOUR` |
90 --! | steps_counter | `0` |
91 --! | motor_pwm | `0000` |
92 --! | motor_en | `00` |
93 --! | ir | `0` |
94 --! @details Test-procedure (8): Chain of Steps - 1 rotation with speed = 0, direction = left
95 --! | signal | desired output |
96 --! | :------------- | :-------------------------------------|
97 --! | mode_state | `COS_1` |
98 --! | pwm_state | cycling `ONE`, `TWO`, `THREE`, `FOUR` |
99 --! | steps_counter | `0` |
100 --! | motor_pwm | `0000` |
101 --! | motor_en | `00` |
102 --! | ir | `0` |
103 --! @details Test-procedure (9): Chain of Steps - 2 rotations with speed = 0, direction = left
104 --! | signal | desired output |
105 --! | :------------- | :-------------------------------------|
106 --! | mode_state | `COS_2` |
107 --! | pwm_state | cycling `ONE`, `TWO`, `THREE`, `FOUR` |
108 --! | steps_counter | `0` |
109 --! | motor_pwm | `0000` |
110 --! | motor_en | `00` |
111 --! | ir | `0` |
112 ARCHITECTURE signal_generator_tb_arch OF signal_generator_tb IS
113 
114  SIGNAL motor_pwm : STD_LOGIC_VECTOR (3 DOWNTO 0);
115  SIGNAL reset_n : STD_LOGIC := '1';
116  SIGNAL clock : STD_LOGIC := '0';
117  SIGNAL direction : STD_LOGIC;
118  SIGNAL speed : STD_LOGIC_VECTOR (2 DOWNTO 0);
119  SIGNAL mode : STD_LOGIC_VECTOR (3 DOWNTO 0);
120  SIGNAL motor_en : STD_LOGIC_VECTOR (1 DOWNTO 0);
121  SIGNAL steps : STD_LOGIC_VECTOR (31 DOWNTO 0);
122  SIGNAL ir : STD_LOGIC;
123  SIGNAL enable : STD_LOGIC := '0';
124 
125  CONSTANT left : STD_LOGIC := '0';
126  CONSTANT right : STD_LOGIC := NOT left;
127 
128  COMPONENT signal_generator
129  PORT
130  (
131  motor_pwm : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
132  reset_n : IN STD_LOGIC;
133  clock : IN STD_LOGIC;
134  direction : IN STD_LOGIC;
135  speed : IN STD_LOGIC_VECTOR (2 DOWNTO 0);
136  mode : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
137  motor_en : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
138  steps : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
139  ir : OUT STD_LOGIC;
140  enable : IN STD_LOGIC
141  );
142  END COMPONENT;
143 
144 BEGIN
145  DUT : signal_generator
146  PORT MAP
147  (
148  motor_pwm => motor_pwm,
149  reset_n => reset_n,
150  clock => clock,
151  direction => direction,
152  speed => speed,
153  mode => mode,
154  motor_en => motor_en,
155  steps => steps,
156  ir => ir,
157  enable => enable
158  );
159 
160  clock <= not clock after 10 ns; --! creates the clock
161  reset_n <= '0' after 40 ns, --! initial reset-trigger
162  '1' after 80 ns;
163  mode <= "0001" after 60 ns; --! CR
164  direction <= right after 60 ns;
165  enable <= not enable after 30 ns;
166  speed <= "111" after 60 ns;
167 
168  finish_sim_time : PROCESS
169  BEGIN
170  WAIT FOR 50 ms;
171  ASSERT false
172  REPORT "simulation finished"
173  SEVERITY failure;
174  END PROCESS finish_sim_time;
175 END;
signal_generator.speed
in speedSTD_LOGIC_VECTOR(2 DOWNTO0)
speed to run moter with
Definition: signal_generator.vhd:75
signal_generator.mode
in modeSTD_LOGIC_VECTOR(3 DOWNTO0)
mode to run motor with
Definition: signal_generator.vhd:74
signal_generator.reset_n
in reset_nSTD_LOGIC
resets the component
Definition: signal_generator.vhd:73
signal_generator.motor_en
out motor_enSTD_LOGIC_VECTOR(1 DOWNTO0)
both enable signals for the motor
Definition: signal_generator.vhd:81
signal_generator.ir
out irSTD_LOGIC
IR signal set when motor stopped.
Definition: signal_generator.vhd:77
signal_generator.motor_pwm
out motor_pwmSTD_LOGIC_VECTOR(3 DOWNTO0)
signal-bus for the motor pulse-width-modulation
Definition: signal_generator.vhd:79
signal_generator.clock
in clockSTD_LOGIC
component clock
Definition: signal_generator.vhd:70
signal_generator.ieee
_library_ ieeeieee
Use Standard Library.
Definition: signal_generator.vhd:59
signal_generator.steps
out stepsSTD_LOGIC_VECTOR(31 DOWNTO0)
number of steps motor did
Definition: signal_generator.vhd:78
signal_generator.direction
in directionSTD_LOGIC
motor direction ('0' is LEFT)
Definition: signal_generator.vhd:76
signal_generator_tb
Entity of testbench for signal_generator.
Definition: signal_generator_tb.vhd:27
signal_generator
Signal Generator.
Definition: signal_generator.vhd:68